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The Enabling Chip Technologies Behind Miniature Implantable Medical Devices

We contributed a post to Planet Analog:

[Editor’s note: Co-authors are from Cactus Semiconductor Inc. — Andy Kelly, System and IC Architect, and James McDonald, President.]

Implantable medical devices (IMDs) have an approximate size of ~15 to 50 cc. Such devices are common for use in the chest or abdomen. They can be implanted there using long leads or catheters. Implantable medical devices often require invasive surgery to implant. Such IMDs include pacemakers, defibrillators, spinal cord stimulators, drug infusion pumps, and more. These devices are widely popular. However, today miniature implantable medical devices (MIMDs) are capturing much more attention as they continue to usher in a new era of treatment capabilities. The enabling chip technologies behind MIMDs will be critical to their continued adoption.

Today’s MIMDs consist of <4 cc volumes and are applied to areas of the body that include the head, neck, and limbs. They can often be implanted with minimally invasive surgery and sometimes even without surgery at all. A common non-surgical implant method is to use small leads or catheters. MIMDs include ECG/EEG monitors, peripheral nerve stimulators, micro infusion pumps, and other similar devices. A more specific example of an MIMD would be a nerve stimulator with a volume of <1 cc. This device would be small enough to implant at the point of therapy with minimally invasive surgery. With its small footprint compared to an IMD, it would not need to be implanted in the chest nor require long leads routed to the neck. Naturally, there are a lot of miniaturization technologies necessary to make it all happen. So, what are some of these MIMD enabling technologies?

Enabling technologies
Chip-scale packaging (CSP) is critical. The use of DIP, SOIC, and QFP packaging common with IMDs is replaced by QFN or WLP packaging in MIMDs. As a comparison, these new packages are 250 times smaller than, for example, a DIP package. In addition, stacked chip-scale packaging (SCSP) allows for multiple chips in one package. It’s possible to have stacked on a substrate an application-specific IC (ASIC), radio frequency IC (RFIC), microcontroller IC (MCU), and non-volatile memory (NVM) IC. This can provide complete system functionality in a single package. Packaging advances will continue to play a key role in enabling more and more MIMD applications. Read more.